Metal Spin on ASIC

[Nelson Goforth]

There have been a number of posts from Jannard and Jarred about the ASIC "metal spin"... or "re-spinning the ASIC" or suchlike, but I haven't been able to find anything about exactly what that means!

Everything I can find about metal spinning has to do with making rounded or 3d objects out of flat metal blanks. But I can't see how that applies to a computer chip like an ASIC.

Could someone enlighten me?

Thank you,
Nelson

[Steven Caesare]

The ASIC uses metal interconnects for all the gates on chip.

A metal "respin" means correcting the errors/flaws in the interconnects on that particular layer.

-sc

[David Rasberry]

Spin in this case means a round trip through the complete design, engineering, fabrication cycle to produce a new chip. In the case of the RED ASIC this involved only correcting design flaws in the metal conductive circuit layers as opposed to the silicon semi-conductor layers.

[alex lemon]

Spin in this case means a round trip through the complete design, engineering, fabrication cycle to produce a new chip. In the case of the RED ASIC this involved only correcting design flaws in the metal conductive circuit layers as opposed to the silicon semi-conductor layers.

any updates on how the re-spin is progressing?

[David M]

There have been a number of posts from Jannard and Jarred about the ASIC "metal spin"... or "re-spinning the ASIC" or suchlike, but I haven't been able to find anything about exactly what that means!

Everything I can find about metal spinning has to do with making rounded or 3d objects out of flat metal blanks. But I can't see how that applies to a computer chip like an ASIC.

Could someone enlighten me?

Thank you,
Nelson

This page might be helpful. http://www.chipx.com/asic-options.html

There are various types of ASIC, but it sounds like RED are using a Hybrid ASIC.

If you were designing a computer system the usual way (say for a cellphone or the RED one) you would first select the set of off-the-shelf chips you need for the application, then design a printed circuit board that both physically holds them and electrically connects them together, and then get someone to assemble and solder them on.

With a Hybrid ASIC, instead of having all the individual chips separately packaged and connected by printed circuit boards, the "chips" are actually all fabricated on the one pieceof silicon, at the same time, and directly connected together by the metallization layer(s).

The metallization layer(s) serve the same purpose as the copper tracks on a conventional printed circuit board, and the construction is actually similar to the way printed circuit boards are made, except instead of using copper foil glued to a sheet of plastic, a layer of metal is vacuum-sputtered onto the chip surface. After that a layer of photoresist is added and the layer is etched to form the individual conductors, much the same way it is done with a printed circuit board.

This has several advantages. It allows a much more compact layout, and the short connecting conductors speed up data transmission times. It can also be cheaper, but only if you make a lot of them.

As with printed circuit boards, more complex circuits need more than one layer to make all the connections, so as each layer is finished, a layer of insulation has to be laid over it, and this then has to also be photo-etched to allow more connections to be made in subsequent layers.

Generally, it's not that common for there to be actual "DC" wiring mistakes, it's more that certain signal paths turn out to be problematic when the device is fired up for the first time. (Which again is pretty similar to what can happen with a conventional PC board).

A "Metal Re-spin" basically means a redesign of the "circuit board" rather than a re-fabrication of the whole chip. Applying the metallization is generally a much lower-tech operation than actually fabricating the chips themselves.

As to why it's called a "Re-Spin", I have no idea. I know the way they apply the photoresist is called "spin coating" where the silicon wafer is spun at high speed (like a CD or record) and a single drop of the coating is dripped onto it. When it hits the surface it instantly spreads out into an even coating. They have to do this for every processing step in the fabrication process. Whether this has anything to do with it, I don't know.

[David Battistella]

Now that was some dense information presented very clearly!

David

[Leif Thomas]

I LOVE learning things in a dense way. Thanks David!

[Nelson Goforth]

Thanks for the clarification everyone.

[Milan Spasic]

That was a well laid out post professor David M.
First time I've actually got a grasp of ASIC.

[MichaelHalsell]

any updates on how the re-spin is progressing?

No updates directly, but the word on the street is that Epic prototypes will be available for inspection at NAB 2010. So I hoping that this is our indirect answer.